ICCCAS Invited Speaker

Hao San

Tokyo City University, Japan

Biography: Hao San received M.S. and Dr. Eng. degrees in electronic engineering from Gunma University, Japan, in 2000 and 2004, respectively. From 2000 to 2001, he worked with Kawasaki Microelectronics, Inc. He joined Gunma University as an assistant professor in the Department of Electronic Engineering in 2004. In 2009, he joined Tokyo City University, and is presently a professor in Department of Electrical, Electronics and Communication Engineering there. His research interests include analog and mixed-signal integrated circuits. Dr. San has been an Associate Editor of IEICE Transactions on Electronics from 2010 to 2016. He was the treasurer of the IEEE Circuits and Systems Society Japan Chapter from 2011 to 2012. He is a member of the IEEE, IEICE and IEEJ.
Speech Title: CMOS SAR ADC with Large Input Amplitude Tolerance Beyond Supply Voltage
Abstract: This talk presents a CMOS SAR ADC that tolerates large input amplitudes exceeding the supply voltage. A novel switched-capacitor sample-and-hold (S/H) circuit, incorporating the proposed floating sampling technique, effectively attenuates large input amplitudes within the specified range of low supply voltage SAR ADCs, regardless of the common-mode level of the analog input. A 0.7V 12-bit SAR ADC with the proposed floating sampling circuit is designed in 65nm CMOS technology. The simulation results show an SNDR of 63.74 dB and an ENOB of 10.30 bits when sampling a sinusoidal input of Vin_ppd=2.8V (peak-to-peak differential input voltage) biased at Vin,CM = 1.4 V, operating at 3 MS/s. The simulation includes the thermal noise of MOSFETs and capacitors in the proposed SAR ADC. The SPICE simulation results demonstrate the feasibility and effectiveness of the proposed circuit technique for extending the dynamic range of low supply voltage SAR ADCs.