ICCCAS Invited Speaker
Kentaroh Katoh
Fukuoka University, Japan
Biography: Kentaroh Katoh received the
B.E. and M.E. degrees from Nagoya University, Nagoya, Japan, in 1997 and
1999, respectively, and the Ph.D. degree from Chiba University, Chiba,
Japan, in 2009. From 1999 to 2001, he was employed with Fujitsu Ltd. He
joined Chiba University in 2001. He worked with the Tsuruoka National
College of Technology as an Associate Professor from 2011 to 2018. He was a
Cooperative Researcher with the Division of Electronics and Informatics,
Gunma University. He is currently an Assistant Professor of the Dept. of
Electronics Engineering and Computer Science, Fukuoka University. His
research interest includes reliability and security of analog and mixed
signal LSI, data converter, and digital LSI. He is also interested in design
of power circuits.
Speech Title: A Strong Physical Unclonable Function Using Dual Time-to-Digital Converters for AMD FPGAs
Abstract:
We propose a Strong FPGA Physical Unclonable Function (PUF) for AMD
FPGAs using two identical Time-to-Digital Converters (TDCs) with only
Look-Up Tables (LUTs) and Flip-Flops (FFs). In normal operation mode, the
proposed PUF operates as two independent single delay-line based TDCs
(SL-TDCs). In PUF mode, the proposed PUF utilizes the remaining resources
within the implemented Configurable Logic Blocks (CLBs) to construct
identical TDCs with nonuniform delay and a wide measurement range. By
simultaneously inputting the same time interval multiple times to these
TDCs, delay measurements are performed. The response output is generated
from the average delay difference obtained from the measurement results. By
inputting a large time interval to the wide measurement range TDCs, the
effects of manufacturing variations of the implemented chip appear as an
average delay difference. Additionally, by compensating the measurement
range variations of the two TDCs, improvements in uniformity and uniqueness
are achieved.