ICCCAS Invited Speaker

Masahiro Sasaki

Shibaura Institute of Technology, Japan

Biography: Masahiro Sasaki received the B.Eng., M.Eng., and Dr.Eng. degrees in Electrical Engineering from Waseda University, Tokyo, Japan, in 1994, 1996, and 2003, respectively. He joined Nissan Motor Co., Ltd., Tokyo, Japan, in 1996, where he was engaged in research and development related to electronic control units and electric vehicles. From 2001 to 2004, he was a Research Associate in the Department of Electrical Engineering at Waseda University.
From 2004 to 2011, he served as an Assistant Professor at the VLSI Design and Education Center (VDEC), University of Tokyo. In 2011, he joined the Shibaura Institute of Technology as an Associate Professor, where he is currently a Professor in the Advanced Electronic Engineering Course, Electrical and Electronic Engineering Program, College of Engineering.
His research interests include high-speed and high-resolution analog and time-domain integrated circuits, nonlinearity analysis and improvement of analog integrated circuits, digital integrated circuit design, and signal processing algorithms. He is a member of the IEEE Solid-State Circuits Society and the Microwave Theory and Technology Society, as well as the Institute of Electronics, Information and Communication Engineers (IEICE) Electronics Society.
Speech Title: Precision Time-Domain Circuits for Delay Measurement and Amplification
Abstract: This talk presents two time-domain circuit techniques for precise on-chip measurement, adjustment, and amplification of digital signal timing.
First, we introduce a circuit for on-chip skew adjustment that enables simultaneous measurement of jitter and setup time. By integrating skew control with timing variation monitoring, the circuit allows accurate compensation for clock and data skew, leading to enhanced system reliability and timing margin optimization.
Second, we propose a tiny two-stage time-difference amplifier (TDA) operating at 1 GHz, designed to amplify input time differences without imposing limitations on the input range or exhibiting extreme points, which are common drawbacks in conventional TDAs.
The proposed TDA achieves wide input dynamic range, linear response, and compact implementation, making it highly suitable for high-speed and low-power applications.
Together, these two circuits demonstrate innovative approaches to handling critical timing parameters entirely within the time domain, without relying on bulky analog components.
The techniques are particularly beneficial for modern integrated circuits where tighter timing margins, higher clock frequencies, and growing process variations demand more precise and robust time-domain processing.
Future extensions of these circuits could further enable improved calibration, testing, and adaptive control in advanced digital and mixed-signal systems.